Emulation & Prototyping Engineer
About the Role
You will build and maintain FPGA and emulation platforms for large-scale SoC and ASIC designs. You will map RTL designs to FPGA and emulation platforms, develop test environments and infrastructure for hardware/software co-verification, and support hardware bring-up and software validation. You will collaborate with verification engineers to run regressions, accelerate debug cycles, and optimize partitioning, synthesis, and runtime performance on emulation systems. You will work cross-functionally with RTL design, verification, and firmware/software teams and perform scripting and automation to streamline emulation flows.
Requirements
- BSc or MSc in Electrical Engineering or Computer Engineering
- 4–7 years of experience in FPGA prototyping or emulation of ASIC/SoC designs
- Strong understanding of digital design and RTL (Verilog, SystemVerilog, VHDL)
- Hands-on experience with at least one emulation or prototyping platform (Palladium, Protium, Veloce, ZeBu, or FPGA-based)
- Good knowledge of synthesis, timing closure, and design partitioning for FPGA and emulation
- Familiarity with verification methodologies and environments (UVM, SystemVerilog, C)
- Experience with scripting for automation (Tcl, Python, Perl, or Shell)
- Strong problem-solving and debugging skills
- Ability to work in a fast-paced, collaborative environment
- Excellent communication and teamwork skills
- Preferred experience with software bring-up, driver validation, or firmware testing on emulation
- Preferred knowledge of bus protocols (Ethernet, DDR) and debug tools (waveform viewers, logic analyzers, or emulation debug frameworks)
- Preferred background in SoC architecture and hardware/software co-design
Responsibilities
- Build and maintain FPGA and emulation platforms for large-scale SoC and ASIC designs
- Map RTL designs to FPGA and emulation platforms
- Develop test environments and infrastructure for hardware/software co-verification
- Support hardware bring-up and software validation on emulation platforms
- Collaborate with verification engineers to run regressions and accelerate debug cycles
- Optimize partitioning, synthesis, and runtime performance on emulation systems
- Work cross-functionally with RTL design, verification, and firmware/software teams
Skills
SynthesisTiming ClosurePerlTclEthernetHardware Bring-UpUvmSystemverilogDdrLogic AnalyzerHardware ModelingVerilogHardware-Software Co-DesignShellSoc ArchitectureEmulationVhdlDriver ValidationWaveform ViewerDesign PartitioningPartitioningCo-VerificationPalladiumProtiumVeloceFirmware TestingZebuHardware/Software Co-Design
